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  • 0 - 3 Years
  • Posted : above 1 month

Job Description:

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology Responsibilities

Custom layout design for PHY IP development - Understand design requirements and work closely with the design team and successfully deliver Analog layouts
Perform physical verifications like DRC/LVS/Reliability and fixing violations

Requirements

Hands on layout experience in various analog IP like Opamps, Bandgaps, Dataconverters, LDO and PLL etc
Understanding layout effects on the circuit such as speed, capacitance, power and area etc,
Knowledge of various analog layout techniques like matching, shielding etc,
Good understanding of DSM technology methodology, issues etc,
Having worked on latest technology nodes, 28nm and below, is desired
Must have good communication skills and should be team player
Scripting and automation experience is a plus

Were doing work that matters Help us solve what others cant

Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : Telecom, IT-Hardware/Networking
Functional Area : IT Hardware : Hardware Products & Services
Role : Hardware Design
Salary : Not Mentioned
Deadline : 17th Nov 2019

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