• ASIC Verification Jobs in Bangalore,India

  • Alten Calsoftlabs
  • Save Job
  • 5 - 8 Years
  • Posted : above 1 month

Job Description:

Roles & Responsibilities

Expect the engineers to know programming or scripting in Perl or C/C System Verilog and UVM methodology is the basic requirement
Broad exposure with video codecs, image processing, motion detection, AXI bus, Ethernet and other interfaces (no wireless)
Most of their verification (80 PERCENT ) is constrained random verification
This is pure verification requirement
Look for 5 to 8 years experience

Preferred Education

BTech or BE

Location Bangalore

Area of Expertise

Perl or C/C System Verilog and UVM

Experience 5-8 years

Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : IT-Software
Functional Area : IT Hardware : Hardware Products & Services
Role : Hardware Design
Salary : 300000-600000 P/A
Deadline : 22nd Oct 2019

Key Skills:

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