MVS And Extended Architecture - IBM Mainframe

programming environments became obsolete over the years, with the proliferation of a steadily increasing user community, installations began outgrowing their initial virtual storage systems. Solutions at this time were relatively simple—provide separate virtual storage tables for each address space in the system. Thus, each address space could have access to a full range of virtual addresses, each containing 16MB of virtual storage. Unfortunately, it did not take too long before the MVS environment became limited.

First of all we will see the methods used by MVS to increase the number of virtual storage addresses. Suppose you have a two-column field for addressing and the available number range from 00 to 99. This will give you addressability up to 100. If you were to expand the columns by a single digit (000 to 999), you might create an additional thousand addresses—10 times that of the previous amount. The philosophy behind the MVS extended architecture, better known as MVS/XA, is that it simply increases the number of virtual addresses (this is simply the table size to keep track of the bytes) by increasing the size of the field that holds the addresses.

Computers in MVS architecture use binaries rather than decimals for tracking addresses. This is called a 24-bit addressing technique. XA, on the other hand, expands the field address ability to 31 columns, so you can imagine how much more can be fitted into virtual storage by using this scheme. For example, if you start out at address 0 or 00000000 00000000 00000000 all the way to the maximum binary configuration of 11111111 11111111 11111111, the number of bytes you can address is 16,777,216. But if you were to start with the virtual address of 00000000 00000000 00000000 00000000 all the way up to 11111111 111T1111 11111111 11111111, you would have access to 2 billion bytes or, to be precise, 2,147,483,648 bytes (2GB) of storage locations. In contrast, the system has much less real storage. How much less depends on the model of the computer and the overall configuration of the system. So, while MVS gives you a 16MB of virtual storage, MVS/XA enables you to use an addressing scheme that is some 128 times bigger.

To translate a virtual address into a 31-bit real address, a dynamic address translation scheme uses a control register, the Segment Table Origin Register (STOR), a segment table, and 2048 page tables for each address space. The segment table has one entry for each of the 2048 segments in the address space; each entry contains among other things a pointer to the page table for the particular segment. When address translation occurs, the STOR points to the segment table for the address space and the same virtual address for any others.

The page table for each segment has one entry for each of the 256 pages in the segment. If a page is currently in real storage frame, the entry includes the page frame real address corresponding to the page.

MVS/XA can also manage multiprocessing which is the simultaneous use of two or more processors that share the various system hardware devices. MVS/XA modules normally store the information needed to control a particular unit of work or manage a resource in storage areas called control blocks. Generally speaking, there are three types of control blocks within MVS/XA:

  • System - Each system-related control block represents one MVS/XA system. These contain system-wide information, such as how many processors are functioning.
  • Resource - Each resource -related control block represents one resource, such as a processor or auxiliary storage device.
  • Task - Each task-related control block represents one unit of work.

Control blocks work as vehicles for communicating throughout MVS. Such communication is possible because the structure of a control block is known to all of its users and, therefore, all find necessary information about the unit of work or resource.

Control blocks representing many units of the same type can be chained together on queues, with each control block pointing to the next one on the chain. A program can search the queues to find the data for a particular unit of work or resource, which might be an address of a control block or a required unit, or actual data, such as a value, a quantity, or a status flag (for example, where each bit has a specific meaning).

Important things to remember about control blocks are that they are structured, documented, and usually chained together. Finally, we will see what is a program status word (PSW). It is a 64-bit area in the processor that, along with control registers, timing registers, and prefixed registers, provides details crucial to both the hardware and the software. The current PSW includes the address of the next program instruction and control information about the program that is running, such as whether it is running in a 24-bit or 31-bit addressing mode, or whether it is running in the problem program state or supervisor state.

Supervisor state programs are those that supervise and monitor the MVS operating system. Problem state programs can be those developed by IBM as language translators, compilers, and also application programs. Each processor has only one current PSW. Thus, only one of the tasks can execute on a processor at any one time. Multiprogramming is possible, however, because an interruption causes the processor to save the contents of the current PSW, while inserting a new PSW information in order to process the interruption.


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