In a circuit different gates such as encoder, decoder, multiplexer and demultiplexer are combined together to form a combinational circuit. Combinational circuit possess the following characteristics:
The following are some of the important combinational circuits:
The combinational circuit which has two inputs and two outputs is known as Half Adder. The half adder is designed in such a way that single bit numbers A and B can be added by this combinational circuit. For the addition of two single bit numbers half adder is considered as the basic building block. Carry and Sum are the two outputs facilitated by the circuit.
More advanced than Half added circuit, Full adder enables to carry c while adding two one-bit numbers A and B. It is a combinational circuit facilitating three inputs and two outputs.
Only two single digit binary numbers with a carry input is added by the full adder. The longer binary numbers need to be added in practice. The n-bit parallel adder is used for adding two n-bit binary numbers by using a number of full adders. The carry input of the next full adder is connected with the carry output of the previous full adder. One common among such adders is 4 Bit Parallel Adder.
In the below provided block diagram, the LSB of the four bit words A and B is represented by A0 and B0. The lowest stage being the Full Adder-0 the Cin is made to be 0. The rest of the connections remain same as that of a n-bit parallel adder as depicted below. One of the very common and most widely used common logic circuit is the four bit parallel adder.
The 1’s or the 2’s complement of the number can be considered for the subtraction operation. By adding 1’s and 2’S complement of B to A, the subtraction operation (A-B) can be performed. Binary subtraction is performed by using a binary adder. One common among such is 4 Bit Parallel Subtractor.
In order to obtain the 1’s complement, the number that is to be subtracted (B) is passed first. The subtraction is produced by adding A and 2’s complement of B by the 4-bit adder. The polarity of the result is represented by carry output Cout and the results of the binary subtraction are represented by S3 S2 S1 S0. For instance, the Cout = 0 if A > B and the result of the binary form (A-B) is Cout = 1 and both the results are in 2’s complement form.
The combination of two inputs and two outputs form a Half subtractor. An input is produced as the difference between two binary bits and to identify whether 1 has been borrowed, output is produced.A in the subtraction (A-B) is termed as Minuend bit and B is termed as Subtrahend bit.
The combinational circuit the is designed to overcome the loopholes of half subtractor is full subtractor, which has three inputs A,B, C and two outputs D and C'.Here the terminology is referred as follows - C' stands for borrow output, D stands for difference output, C stands for borrow of the previous stage, A stands for minuend and B stands for subtrahend.
This is a combinational circuit with n-data inputs and one output, and m select inputs such that 2m = n. one of the n-data inputs is selected and is routed to produce the output. One of n data inputs is selected and transmitted to the single output Y on the basis of the digital code applied to the selected inputs. The input used for cascading is represented by E. The required operation is performed when it is low and hence is considered as an active low terminal.
There are different variations of multiplexers. They are:
The reverse operation of multiplexer is performed by the demultiplexer. One input is received and is distributed over several outputs. The number of inputs is one, number of output is n and the number of select inputs is m. A specific output line is selected and the input is transmitted to the selected output line. A single pole multiple way switch and de-multiplexer are equal, which is depicted below:
There are different variations of Demultiplexers. They are:
A combinational circuit with n input and maximum m = 2n outputs is a decoder. Demultiplexer and decoder are said to be identical without any input of data. The operations of encoder are oppositely performed by a decoder.
Some of the examples of Decoders are as follows:
In 2 to 4 Line decoder, the inputs are A and B and the outputs are D through D. For a specific combination of inputs, each of the output is 1. The operations of the decoder are explained by the truth table and the block diagram of 2 to 4 line decoder is depicted below:
Encoder is a combinational circuit which performs exactly reverse to that of a decoder. The output lines are m number and the input lines are n number. An n bit binary code which relates to the digital input number is produced by an encoder. An n digital word is considered as an input and is converted into m digital word as output.
Some of the examples of Encoders are as follows:
Input lines are given priority in this priority encoder. When two input lines are at same time, the high priority input line is considered first. For instance, out of the four inputs D0, D1, D2, D3, the highest priority input is D3 and hence is considered first. Consider there are two outputs Y0, Y1. If D3 has the highest priority, then D3=1 and hence Y1 Y1 = 11, without considering any other inputs. In the same way, if D3 = 0 and D2 = 1 then Y1 Y0 = 10 without considering any other inputs.
Computer Logical Organization Tutorial
Computer Logical Organization
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